PLC programming with simulation
Write IEC 61131-3 logic and verify it in a PLC simulator.
20 project-authored proposals · taxonomy v1.1 · 0 new benchmark runs. Verifiers and partial-credit rules below are designs, not executed results.
- Typical applications
- TIA Portal + PLCSIM · CODESYS · Studio 5000 · OpenPLC
- Class GUI-need label
HY· Hybrid
Task proposals · 20
Expand to inspect the complete original wording and proposed checks. Original proposal text remains English in both interfaces.
R07.07.02.01-T01 Program a conveyor start/stop interlock FB in TIA Portal and test it in PLCSIM
Original instruction
In TIA Portal V19 create project Conveyor_Line with an S7-1516-3 PN/DP CPU, tag table per input/io_list.xlsx, and FB 'Conveyor' (LAD) with start/stop seal-in, E-stop (NC) and guard-door interlock, plus 3 s start-delay horn. Call it from OB1 with an instance DB, compile without errors and download to PLCSIM.
- Platforms
win· Windows- Applications
- TIA Portal + PLCSIM
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
drag· Drag & dropclick· Point & clicktype· Text & forms- Work product
WP06· Code/engineering- Conditions
licensed· Licensed pro app- Proposed difficulty
- 3 / 5
Proposed verifier
Grader drives PLCSIM Advanced inputs with 8 scripted scenarios and records outputs: motor only after 3 s horn, drops on stop/E-stop/door open, no restart without new start. Openness export: FB in LAD, tags match IO list. TIA Openness/scripting disabled for the agent.
Proposed partial credit
15% HW/tags; 20% FB compiled; 50% scenario pass rate; 15% LAD language & instance DB
R07.07.02.01-T02 Build a start/stop seal-in ladder rung in OpenPLC and verify in simulation
Original instruction
In OpenPLC Editor create project 'seal_in' with a ladder POU: START (%IX0.0, NO) and STOP (%IX0.1, NC) driving MOTOR %QX0.0 with a seal-in contact. Compile and run it on the OpenPLC Runtime simulator (sandbox), then upload the program.
- Platforms
mac· macOSwin· Windowslin· Linux- Applications
- OpenPLC
- Interfaces
desk· Desktop GUIbrow· Browser- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
G2· GUI-essential- Interaction primitives
drag· Drag & dropclick· Point & click- Work product
WP06· Code/engineering- Conditions
- None declared
- Proposed difficulty
- 2 / 5
Proposed verifier
Grader toggles inputs via Modbus on the runtime: MOTOR latches on START, stays on after release, drops on STOP; POU language LD (XML export); program compiled (st file present).
Proposed partial credit
40% correct ladder logic; 40% runtime behaviour; 20% compiled & uploaded
R07.07.02.01-T03 Write a traffic-light function block in ST that satisfies five temporal properties
Original instruction
In CODESYS V3.5 SP20 write FB TrafficLight (ST) for a two-way intersection with pedestrian request, using timers from docs/timing_spec.md. It must satisfy the 5 LTL properties in docs/properties.smv (no conflicting greens, every request eventually served, yellow precedes red, etc.). Export PLCopenXML to out/traffic.xml.
- Platforms
win· Windows- Applications
- CODESYS · nuXmv
- Interfaces
desk· Desktop GUIterm· Terminal- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
code· Code & commandstype· Text & forms- Work product
WP06· Code/engineering- Conditions
- None declared
- Proposed difficulty
- 4 / 5
Proposed verifier
Grader translates ST (PLCverif) and model-checks the 5 properties with nuXmv: all hold; timing spec simulated in CODESYS Control Win: phase durations ±1 scan.
Proposed partial credit
15% compiles; 60% properties hold (12 pts each); 25% timing simulation
R07.07.02.01-T04 Sort parts by colour on a Factory I/O twin driven by PLCSIM Advanced
Original instruction
Open scene 'Sorting by Height (Advanced)' variant 'colour sorter' in Factory I/O with driver Siemens S7-PLCSIM Advanced. In TIA Portal program the S7-1500 so blue, green and metal parts are routed to their 3 chutes, the line stops on jam (sensor blocked >5 s) and resumes on reset. Run 10 minutes of random parts.
- Platforms
win· Windows- Applications
- TIA Portal + PLCSIM · Factory I/O
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
HY· Hybrid- Interaction primitives
drag· Drag & dropmulti· Cross-appvis· Visual judgment- Work product
WP06· Code/engineering- Conditions
licensed· Licensed pro appmultiapp· Multi-applong· Long-horizon- Proposed difficulty
- 5 / 5
Proposed verifier
Factory I/O counters exported via its SDK by grader: ≥98% parts in correct chute, 0 parts fallen, jam scenario injected triggers stop within 5.5 s and resume after reset; tag mapping matches driver config.
Proposed partial credit
15% driver/tag mapping; 55% sorting accuracy; 20% jam handling; 10% no fallen parts
R07.07.02.01-T05 Tune a PIDE tank-level loop in Studio 5000 against an emulated plant
Original instruction
In Studio 5000 Logix Designer v36 open fixtures/tank_level.ACD running in Logix Emulate with a first-order-plus-dead-time tank routine. Configure a PIDE instruction (inflow valve CV) and tune it so a 40→60% setpoint step settles within ±2% in under 90 s with overshoot ≤5%, no CV saturation chattering. Download and run the step test.
- Platforms
win· Windows- Applications
- Studio 5000
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
G2· GUI-essential- Interaction primitives
click· Point & clicktype· Text & formsvis· Visual judgment- Work product
WP06· Code/engineering- Conditions
licensed· Licensed pro app- Proposed difficulty
- 4 / 5
Proposed verifier
Grader reads trend via OPC from emulator during its own step test: settling time <90 s, overshoot ≤5%, steady-state error ≤0.5%; PIDE in a periodic task; gains stored in tag.
Proposed partial credit
20% PIDE configured; 40% settling; 25% overshoot; 15% steady state
R07.07.02.01-T06 Implement a batch-mixer sequence in SFC with timers and step interlocks
Original instruction
In CODESYS create an SFC program 'Mixer' per docs/mixer_sequence.pdf: fill A to 40%, fill B to 70%, mix 120 s with heater to 65 °C, drain until low level, with abort to safe state on high-high level from any step. Test against the simulated tank in fixtures/mixer_sim (CODESYS Control Win).
- Platforms
win· Windows- Applications
- CODESYS
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
G2· GUI-essential- Interaction primitives
drag· Drag & dropclick· Point & clicktype· Text & forms- Work product
WP06· Code/engineering- Conditions
- None declared
- Proposed difficulty
- 4 / 5
Proposed verifier
Grader runs 4 scenarios via OPC UA: step order and transition conditions met; mix time 120±1 s; temperature reached before mix timer; HH abort from each step reaches safe outputs within 1 scan; POU language SFC.
Proposed partial credit
15% SFC structure; 45% normal sequence; 25% abort from every step; 15% timing
R07.07.02.01-T07 Write lead/lag pump alternation with runtime balancing in ST for OpenPLC
Original instruction
In OpenPLC Editor write an ST program for 3 pumps: lead starts at level >60%, lag1 at >75%, lag2 at >85%, stop at <40%; lead rotates to the pump with the lowest runtime hours on each new cycle; a failed pump (fault input) is skipped. Run it on the OpenPLC Runtime with the Python tank simulator in fixtures/tank_sim.py.
- Platforms
mac· macOSwin· Windowslin· Linux- Applications
- OpenPLC
- Interfaces
desk· Desktop GUIterm· Terminal- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
code· Code & commandsclick· Point & click- Work product
WP06· Code/engineering- Conditions
- None declared
- Proposed difficulty
- 3 / 5
Proposed verifier
Grader scenario runner (Modbus) over 30 simulated cycles: staging thresholds honored; runtime hours balanced within 5%; faulted pump never started; no two pumps start in the same scan.
Proposed partial credit
35% staging; 30% rotation balance; 20% fault skip; 15% compiles & runs
R07.07.02.01-T08 Migrate an S7-300 STL block to SCL for S7-1500 with identical behaviour
Original instruction
fixtures/legacy_s7300 contains FC120 (STL, 140 lines: indirect addressing, jump lists). In TIA Portal V19 add an S7-1515 and rewrite it as an optimized SCL FB with symbolic access, keeping identical I/O behaviour. Compile, and verify in PLCSIM against the 25 test vectors in input/fc120_vectors.csv.
- Platforms
win· Windows- Applications
- TIA Portal + PLCSIM
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
AP· API-sufficient- Interaction primitives
code· Code & commandsclick· Point & click- Work product
WP06· Code/engineering- Conditions
licensed· Licensed pro app- Proposed difficulty
- 4 / 5
Proposed verifier
Grader runs the 25 vectors plus 25 hidden on PLCSIM Advanced: outputs equal legacy reference; new block language SCL, optimized access, no absolute addressing (Openness export scan).
Proposed partial credit
15% compiles; 55% vector equivalence (scaled); 15% optimized/symbolic; 15% hidden vectors
R07.07.02.01-T09 Write an object-oriented motor FB with interfaces and unit tests in CODESYS
Original instruction
In CODESYS create interface I_Motor (Start, Stop, Reset, Status) and FB FB_DOLMotor implementing it with feedback-timeout fault (2 s) and run-hours counter. Add a CfUnit (or TcUnit-style) test suite with ≥6 tests covering start, stop, timeout, reset and hours, and run them in simulation.
- Platforms
win· Windows- Applications
- CODESYS
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
code· Code & commandstype· Text & forms- Work product
WP06· Code/engineering- Conditions
- None declared
- Proposed difficulty
- 3 / 5
Proposed verifier
PLCopenXML export: interface and FB IMPLEMENTS it; grader's own 10 hidden tests pass in CODESYS Control Win; agent's test suite ≥6 tests all passing.
Proposed partial credit
20% OOP structure; 50% hidden tests; 30% own test suite
R07.07.02.01-T10 Create a valve Add-On Instruction with faults and alarm bits in Studio 5000
Original instruction
In Studio 5000 create AOI 'Valve_2Pos' with parameters Open_Cmd, ZSO, ZSC, travel-time preset, outputs Sol, Opened, Closed, Fault_Travel, Fault_Both, and an Inhibit input. Use it for XV101-XV104 in fixtures/skid.ACD and test in Logix Emulate.
- Platforms
win· Windows- Applications
- Studio 5000
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
G2· GUI-essential- Interaction primitives
click· Point & clicktype· Text & formsdrag· Drag & drop- Work product
WP06· Code/engineering- Conditions
licensed· Licensed pro app- Proposed difficulty
- 3 / 5
Proposed verifier
L5X export: AOI with parameter list/types; 4 instances; grader emulator scenarios: travel fault after preset, both-switch fault, inhibit blocks Sol; normal open/close.
Proposed partial credit
25% AOI interface; 50% scenario behaviour; 25% 4 instances wired
R07.07.02.01-T11 Configure an ET 200SP station and I/O addresses to match an I/O list
Original instruction
In TIA Portal add an ET 200SP IM155-6 PN ST to project fixtures/line3.ap19 with modules DI 16x24VDC, DQ 16x24VDC/0.5A, AI 4xI 2/4-wire, AQ 2xU/I, set start addresses per input/io_list_line3.xlsx, assign device name 'et200sp-l3' and IP 192.168.0.30, compile without errors.
- Platforms
win· Windows- Applications
- TIA Portal + PLCSIM
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
drag· Drag & dropclick· Point & clicktype· Text & forms- Work product
WP08· App/system state- Conditions
licensed· Licensed pro app- Proposed difficulty
- 2 / 5
Proposed verifier
Openness hardware export: module order numbers, slots, I/O start addresses equal list; PROFINET name/IP; compile 0 errors.
Proposed partial credit
40% modules; 30% addresses; 15% network; 15% compiles
R07.07.02.01-T12 Read and write a Modbus TCP slave from CODESYS and verify the exchange
Original instruction
In CODESYS add a Modbus TCP Master to the soft PLC and a slave device at 127.0.0.1:5020 (the pymodbus simulator in fixtures/vfd_sim.py emulating a drive). Map holding registers 40001-40004 (command, speed ref, status, actual speed), write logic to start the drive at 35 Hz and stop on a stop bit. Verify on the simulator log.
- Platforms
win· Windows- Applications
- CODESYS
- Interfaces
desk· Desktop GUIterm· Terminal- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
click· Point & clicktype· Text & formscode· Code & commands- Work product
WP06· Code/engineering- Conditions
multiapp· Multi-app- Proposed difficulty
- 3 / 5
Proposed verifier
Simulator log shows FC16/FC03 exchanges at configured cycle; command word sequence start→run; speed ref 3500 (0.01 Hz units); stop sets command 0; device tree config exported.
Proposed partial credit
30% device config; 30% register mapping; 40% correct command/speed exchange
R07.07.02.01-T13 Formally verify a burner interlock with PLCverif and fix the counterexample
Original instruction
fixtures/burner.st (IEC 61131-3 ST) should guarantee: fuel valve never open unless flame detected within 3 s of ignition, and purge ≥30 s precedes ignition. Run PLCverif (nuXmv backend) for both requirements, analyze the counterexample, fix the code, and re-verify. Save out/burner_fixed.st and the reports.
- Platforms
lin· Linuxwin· Windows- Applications
- PLCverif · nuXmv
- Interfaces
term· Terminal- GUI need · task setting
CL· CLI-sufficient- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
code· Code & commands- Work product
WP06· Code/engineering- Conditions
- None declared
- Proposed difficulty
- 3 / 5
Proposed verifier
Grader reruns PLCverif: both requirements satisfied; original counterexample scenario no longer reachable; diff minimal (≤15 lines); behaviour on normal start sequence unchanged in simulation.
Proposed partial credit
20% requirements formalized; 20% counterexample explained; 45% verified fixed; 15% minimal change
R07.07.02.01-T14 Add Program_Alarm-based alarms with associated values in TIA Portal
Original instruction
In fixtures/pumpstation.ap19 add Program_Alarm instances in FB 'Pump' for: dry-run (low suction pressure >5 s), motor overload, and feedback timeout, each with class, priority and associated value (pressure in bar). Compile, download to PLCSIM and trigger each alarm once in PLCSIM; export the alarm texts.
- Platforms
win· Windows- Applications
- TIA Portal + PLCSIM
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
AP· API-sufficient- Interaction primitives
click· Point & clicktype· Text & formsdrag· Drag & drop- Work product
WP06· Code/engineering- Conditions
licensed· Licensed pro app- Proposed difficulty
- 3 / 5
Proposed verifier
Openness export: 3 Program_Alarm calls with texts/classes/priorities; grader triggers conditions on PLCSIM Advanced and reads alarm buffer: each appears with correct associated value; dry-run delay 5 s.
Proposed partial credit
30% alarm definitions; 45% alarms fire correctly; 25% associated values
R07.07.02.01-T15 Find and fix why an elevator controller misses floor requests
Original instruction
fixtures/elevator_codesys/ is a 4-floor elevator program with a simulated car. Users report requests made while the car is moving past a floor are lost. Reproduce in simulation, locate the bug (edge detection/latch), fix it, and keep the 12 existing test scenarios in tests/ passing. Document the root cause in out/rca.md.
- Platforms
win· Windows- Applications
- CODESYS
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
code· Code & commandsvis· Visual judgmentclick· Point & click- Work product
WP06· Code/engineering- Conditions
hidden· Hidden/stale state- Proposed difficulty
- 4 / 5
Proposed verifier
Grader scenarios incl. 8 hidden request-while-moving cases: all requests served; original 12 pass; rca.md names the faulty POU and mechanism.
Proposed partial credit
20% reproduce; 40% hidden scenarios; 25% existing tests; 15% RCA
R07.07.02.01-T16 Compile an IEC 61131-3 ST program headlessly with MATIEC and a test runner
Original instruction
Using the MATIEC compiler (iec2c) and a C test harness, compile fixtures/counter_fb.st (FB with up/down counting and preset) and write a test runner that executes 20 scan cycles from input/scan_vectors.csv and writes outputs to out/trace.csv.
- Platforms
lin· Linux- Applications
- OpenPLC · MATIEC
- Interfaces
term· Terminal- GUI need · task setting
CL· CLI-sufficient- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
code· Code & commands- Work product
WP06· Code/engineering- Conditions
- None declared
- Proposed difficulty
- 2 / 5
Proposed verifier
Build reproduces from script; trace.csv equals reference trace for 20 scans; also passes a hidden vector file.
Proposed partial credit
40% compiles; 40% trace correct; 20% hidden vectors
R07.07.02.01-T17 Exchange produced/consumed tags between two emulated Logix controllers
Original instruction
In Studio 5000 configure two controllers in Logix Emulate (slots 2 and 3) with a produced tag 'LineStatus' (UDT with heartbeat DINT, state, count) on C1 consumed by C2 with RPI 20 ms, plus heartbeat monitoring on C2 that faults after 3 missed updates. Download both and demonstrate the heartbeat fault by inhibiting the connection.
- Platforms
win· Windows- Applications
- Studio 5000
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
G3· GUI-only- Interaction primitives
click· Point & clicktype· Text & formsmulti· Cross-app- Work product
WP06· Code/engineering- Conditions
licensed· Licensed pro appmultiapp· Multi-app- Proposed difficulty
- 4 / 5
Proposed verifier
L5X exports: UDT identical on both, produced/consumed config with RPI 20 ms; grader reads C2 tags: data mirrors C1; inhibiting connection sets fault within 3×RPI-based window.
Proposed partial credit
25% UDT & tags; 25% connection config; 25% data exchange; 25% heartbeat fault
R07.07.02.01-T18 Expose PLC tags through the S7-1500 OPC UA server and read them from a client
Original instruction
In fixtures/boiler.ap19 enable the CPU's OPC UA server (port 4840, security None for the sandbox), create a server interface 'BoilerIF' exposing 6 tags from input/opcua_tags.csv (read-only except setpoint), download to PLCSIM Advanced, and read/write them with UaExpert; save a client log.
- Platforms
win· Windows- Applications
- TIA Portal + PLCSIM · UaExpert
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
G2· GUI-essential- Interaction primitives
click· Point & clickmulti· Cross-app- Work product
WP08· App/system state- Conditions
licensed· Licensed pro appmultiapp· Multi-app- Proposed difficulty
- 3 / 5
Proposed verifier
Grader OPC UA client browses server: interface with 6 nodes, access levels per CSV; write to setpoint succeeds, write to others rejected; log shows reads.
Proposed partial credit
25% server enabled; 40% interface nodes; 25% access rights; 10% client log
R07.07.02.01-T19 Home and position a simulated axis with PLCopen motion blocks in CODESYS
Original instruction
In CODESYS SoftMotion (simulation axis, 10 mm/rev), write a program using MC_Power, MC_Home (home switch at 0 mm, offset 2 mm), MC_MoveAbsolute and MC_Stop: home, move to 150 mm at 200 mm/s, dwell 1 s, move to 20 mm, with jerk-limited profile (accel 1000 mm/s²) and stop on a stop request with deceleration 2000.
- Platforms
win· Windows- Applications
- CODESYS
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
code· Code & commandsclick· Point & clickvis· Visual judgment- Work product
WP06· Code/engineering- Conditions
tutorial· Follow docs/tutorial- Proposed difficulty
- 5 / 5
Proposed verifier
Grader traces axis position/velocity via OPC UA: homing sets position 2 mm at switch; targets reached ±0.01 mm; velocity ≤200; accel ≤1000; stop request decelerates at 2000 ±5%; no error state.
Proposed partial credit
20% power/homing; 40% positioning profile; 20% limits; 20% stop handling
R07.07.02.01-T20 Build a recipe data block and a loader FB tested in PLCSIM
Original instruction
In TIA Portal create UDT 'Recipe' (name, temp_sp, time_s, speed_pct), a global DB with an array of 10 recipes populated from input/recipes.csv, and FB 'LoadRecipe' (SCL) that copies recipe n to the active setpoints with range checking (reject n out of range, flag error). Test in PLCSIM.
- Platforms
win· Windows- Applications
- TIA Portal + PLCSIM
- Interfaces
desk· Desktop GUI- GUI need · task setting
HY· Hybrid- GUI need · ordinary access
CL· CLI-sufficient- Interaction primitives
type· Text & formsclick· Point & clickcode· Code & commands- Work product
WP06· Code/engineering- Conditions
licensed· Licensed pro app- Proposed difficulty
- 3 / 5
Proposed verifier
Openness export: UDT fields/types; DB start values equal CSV; grader calls with n=1..10 and invalid values on PLCSIM Advanced: active setpoints correct, error flag set for invalid without overwrite.
Proposed partial credit
20% UDT; 30% DB values; 35% loader behaviour; 15% error handling
Mapped research references
Existing benchmark-to-class links from the research catalog. They are not record-level annotations, executions or product endorsements.